부산대학교 도서관

System-on-a-chip (SoC) devices promise lighter, smaller, cheaper, more capable and more reliable space electronic systems. This paper describes the focal plane interface electronics - digital (FPIE-D) Xilinx Zynq-based data acquisition, cloud-screening, compression, storage and downlink computing system developed by the Jet Propulsion Laboratory (JPL), Alpha Data, Correct Designs and Mercury Systems for the NASA Earth Surface Mineral Dust Source Investigation (EMIT) instrument. EMIT is an imaging spectrometer that acquires 1280 cross-track by 328 band images at 216 images/sec. Following launch (14 July 2022), EMIT has been installed outside the International Space Station (ISS) and is collecting data from science targets in arid dust source regions of the Earth. EMIT will be used to study the mineral dust cycle which has multiple impacts on the Earth System. The science objective of EMIT is to close the gap in our understanding of mineral dust heating and cooling impact on the Earth now and in the future by determining the surface mineralogy of mineral dust sources. The EMIT FPIE-D board design is based on a standard Alpha Data COTS Zynq7100 board in an XMC form factor. The FPIE-D Alpha Data hardware and components, including a Mercury Systems 440 GByte RH3440 Solid-State Data Recorder (SSDR), fit into a 280mm×170mm×40mm assembly. The FPIE-D peak power usage is 40 W. The computing element is a Xilinx Zynq Z7100 which includes a Kintex-7 FPGA and dual-core ARM Cortex-A9 Processor [7]–[9]. The COTS board was re-spun to make it suitable for space (replacing components with space grade equivalents) and to add features needed for the mission. The FPIE-D board is designed to be very flexible, and not specific to EMIT mission. The FPIE-D assembly with its Zynq SoC controls the other assemblies on the EMIT instrument. The FPIE-D Zynq Processing System is responsible for running the flight software, which includes command & data handling, command & telemetry with ISS over 1553 and science data downlink over a 7.4 Mbps Ethernet interface to the ISS. The Zynq Programmable Logic (PL) of the FPIE-D interfaces with the SSDR through a 3.125 Gbps Serial RapidIO interface. The SSDR alleviates the effect of two data rate bottlenecks in the FPIE-D System: data compression implemented on Zynq PL with a data compression (input) rate of 370 Mbps, and the data transfer to the ISS at 7.4 Mbps. The FPIE-D includes three processing elements implemented in the Zynq PL: (1) the Fast Lossless extended (FLEX) data compression block (a modified implementation of the CCSDS-123.0-B-2 recommended standard), which is providing 3.4:1 lossless compression (compared to 16 bit samples obtained after co-adding) and 21 MSamples/sec throughput; (2) co-adding capability of two successive images so that shorter exposures can be used, helping to avoid saturation of the Focal Plane Array during acquisition; and (3) cloud detection and screening so that cloudy images can be dropped prior to compression, saving SSDR space and downlink time.