학술논문

A Full-Custom Design Flow and a Top-Down RTL-to-GDS Flow for Adiabatic Quantum-Flux-Parametron Logic Using a Commercial EDA Design Suite
Document Type
Periodical
Source
IEEE Transactions on Applied Superconductivity IEEE Trans. Appl. Supercond. Applied Superconductivity, IEEE Transactions on. 33(5):1-6 Aug, 2023
Subject
Fields, Waves and Electromagnetics
Engineered Materials, Dielectrics and Plasmas
Libraries
Layout
Transformers
Logic gates
Inductors
Inductance
Standards
Superconductor digital circuit
adiabatic quantum-flux-parametron
synthesis
top-down design
full-custom design
Language
ISSN
1051-8223
1558-2515
2378-7074
Abstract
The adiabatic quantum-flux-parametron (AQFP) circuit is a superconductor digital logic family with extremely low power consumption. It consumes five orders less power than the state-of-the-art CMOS circuits and three orders of magnitude less power than RSFQ circuits, another competing digital superconductor technology. The computing resources required by society are increasing every year, and the AQFP circuit is a strong candidate for the next generation of computers. In previous research, a 4-bit MANA microprocessor and a 16-bit Kogge-Stone adder using AQFP logic were designed and demonstrated. These circuits were designed almost by hand, and the development environment needs to be improved to implement AQFP circuits for practical applications. So, we used Synopsys EDA tools typically used for CMOS design to create a full-custom design flow for logic cell design and a top-down flow to design combinational logic circuits automatically. We integrated a circuit design editor with simulation and verification tools for the full-custom design flow. For the top-down flow, we created an environment that automatically performs logic synthesis, path balancing, cell placement, and signal and excitation routing. 1024-bit adders with more than two million Josephson junctions (JJs) have been successfully designed.