학술논문

Randomized Testing of RISC-V CPUs Using Direct Instruction Injection

Document Type

Periodical

Author

Joannou, A.; Rugg, P.; Woodruff, J.; Fuchs, F.A.; van der Maas, M.; Naylor, M.; Roe, M.; Watson, R.N.M.; Neumann, P.G.; Moore, S.W.

Source

IEEE Design & Test IEEE Des. Test Design & Test, IEEE. 41(1):40-49 Feb, 2024

Subject

Computing and Processing
Components, Circuits, Devices and Systems
Testing
Reduced instruction set computing
Random processes

Language

ISSN

2168-2356
2168-2364

Abstract

This article presents a randomized testing framework for RISC-V implementations by using a technique called direct instruction injection for test injection. —Fei Su, Intel, USA

Online Access

Full Text (IEEE) Web of Science JCR 저널정보 Scopus Find it@PNU

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