학술논문

A 65 nm 12.92-nJ/Inference Mixed-Signal Neuromorphic Processor for Image Classification
Document Type
Periodical
Source
IEEE Transactions on Circuits and Systems II: Express Briefs IEEE Trans. Circuits Syst. II Circuits and Systems II: Express Briefs, IEEE Transactions on. 70(8):2804-2808 Aug, 2023
Subject
Components, Circuits, Devices and Systems
Neurons
Reservoirs
Classification algorithms
Switches
Image classification
Capacitors
Neuromorphics
Neuromorphic processor
mixed-signal circuit
echo state network
spiking neural network
leaky integrate and fire neuron
image classification
Language
ISSN
1549-7747
1558-3791
Abstract
Spiking neural networks are a promising candidate for next-generation machine learning and are suitable for power-constrained edge devices. In this brief, we present a mixed-signal neuromorphic processor that efficiently implements an echo state network (ESN) and achieves high accuracy without a costly on-chip training process. The design employs a charge-domain computation circuit that efficiently realizes a leaky integrate and fire neuron. Combined with optimizing sparse connections, the proposed algorithm-hardware co-design approach results in a highly energy-efficient operation while delivering high accuracy. Fabricated in a 65nm LP process, the processor is measured to achieve 95.35% MNIST classification accuracy, which closely matches the software model, and energy efficiency of 12.92nJ per classification.