학술논문

Design of Scalable Superconducting Quantum Circuits Using Flip-Chip Assembly
Document Type
Periodical
Source
IEEE Transactions on Applied Superconductivity IEEE Trans. Appl. Supercond. Applied Superconductivity, IEEE Transactions on. 33(5):1-6 Aug, 2023
Subject
Fields, Waves and Electromagnetics
Engineered Materials, Dielectrics and Plasmas
Qubit
Flip-chip devices
Metals
Silicon
Couplings
Geometry
Couplers
Flip-chip
multi-qubit
quantum computer
transmon qubit
Language
ISSN
1051-8223
1558-2515
2378-7074
Abstract
We present design results of scalable superconducting quantum circuits using the flip-chip assembly. In order to achieve the longest relaxation time ($T_{1}$) of a qubit possible, gap between two chips in flip-chip assembly is determined to be 12 μm where low surface dielectric loss from two-level system (TLS) defects can be achieved while maintaining large readout coupling strength between two chips in the flip-chip assembly. Superconducting transmon qubit design is then optimized to have a target anharmonicity of 200 MHz and to have the longer $T_{1}$ in consideration of surface energy participation ratios of TLS defects within the compact footprint. To achieve strong coupling strength but low qubit to qubit crosstalk (ZZ) for fast and high fidelity multi-qubit gates, direct coupler and compact multi-path coupler designs for coupling qubits are compared by numerically solving Hamiltonian of the coupled two qubits. Monte-Carlo simulation results on the yield rate of the extended circuits indicate that low manufacturing errors are required.