학술논문

Subtractive Ru Interconnect Enabled by Novel Patterning Solution for EUV Double Patterning and TopVia with Embedded Airgap Integration for Post Cu Interconnect Scaling
Document Type
Conference
Source
2022 International Electron Devices Meeting (IEDM) Electron Devices Meeting (IEDM), 2022 International. :12.1.1-12.1.4 Dec, 2022
Subject
Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
Photonics and Electrooptics
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Resistance
Metallization
Atmospheric modeling
Simulation
Current measurement
Conductors
Capacitance
Language
ISSN
2156-017X
Abstract
Fully subtractive TopVia Ru interconnects with embedded airgap have been demonstrated through spacer assisted litho-etch litho-etch (SALELE) patterning, which utilizes a novel spacer pull process to enable a wider design space than alternative spacer-is-metal (SADP-SIM) patterning approaches. Utilizing this approach, we have demonstrated good pattern fidelity and electrical yield for structures with minimum pitch at 18nm. Furthermore, we propose a novel “TopVia” structure, where the metallization for the via is performed together with the metallization for the line below, combined with an integrated airgap. The TopVia integration scheme enables a barrier-less/liner-less via structure leading to maximum conductor volume, with greatly reduced liner thickness at the via contact. Simulation results support significant reductions in both via resistance and capacitance can be achieved by replacing conventional Cu interconnects with Ru TopVia interconnects with airgaps. We believe the combination of a SALELE with spacer pull process and top-via with embedded airgap integration is one of the most promising integration schemes to enable a Ru conductor in future technology nodes.