학술논문
Silicon pin diode array hybrids as building blocks for a vertex detector at an asymmetric B-factory
Document Type
Conference
Author
Source
Conference: 1990 workshop on physics and detection issues for a high luminosity isometric B-factory; Workshop on physics and detection issues for a high luminosity isometric B-factory; 1990 workshop on physics and detection issues for a high luminosity isometric B-factory; Workshop on physics and detector issues for a high-luminosity asymmetric B factory, Stanford, CA (USA); Stanford, CA (USA); Stanford, CA (USA); Stanford, CA (USA), 26-27 Jan 1990; 9-10 Mar 1990; 20-21 Apr 1990; 4-8 Jun 1990
Subject
Language
English
Abstract
Silicon PIN diode hybrid arrays are proposed as the ideal building blocks for a vertex detector at an asymmetric B-factory. The two-dimensional nature of the detector segmentation allows for the maximum in confusion elimination. Fine spatial resolution, on the order of 10 {mu}m per layer, is more than adequate to resolve the displaced vertices of beauty and charm decays. A high signal-to-noise ratio allows for the thinning of the detectors, reducing multiple scattering. Time tagging within the detector permits higher background levels than could otherwise be tolerated, and on-board electronics which includes zero suppression and ghost elimination, eases downstream data handling and analysis. 8 refs., 3 figs.