학술논문

A lateral superjunction SOI LDMOS with double‑conductive channels
Document Type
Article
Source
Journal of Power Electronics, 22(4), pp.694-701 Apr, 2022
Subject
전기공학
Language
English
ISSN
2093-4718
1598-2092
Abstract
A novel lateral superjunction silicon-on-insulator lateral double-diffused MOS with double-conductive channels (DCLDMOS) is proposed and subsequently investigated by the SENTAURUS TCAD. First, the double channels (DC) feature a surface and bulk gate for providing the surface and bulk electron channels, respectively. Second, the P-pillar is inserted into the N-drift to divide it into the N-drift1 and N-drift2 regions. In this manner, the lateral super junction (SJ) can be formed by the sandwich-structured N-drift1/P-pillar/N-drift2. At the forward conduction state, the DC provides the double electron emission channels. The specific on-resistance (Ron,sp) is obviously decreased, and an even higher peak transfer conductance (gm) is achieved. At the breakdown state, the SJ helps to deplete the whole drift, including the N-drift1/P-pillar/N-drift2, and the electric field Efield distribution is effectively optimized. Furthermore, the Ron,sp is significantly decreased by the DC and SJ. Consequently, the tradeoff relationship between BV and Ron,sp is improved by the charge compensation and the assisted depletion effect, which are performed by the SJ. The results indicate that the DC LDMOS can break through the single RESURF and achieve Baliga’s figure of merit (FOM) of 3.32 MW/cm2. In addition, the DC LDMOS with the N-trench (NT) inserted into the buried oxide (DC-NT LDMOS) can achieve better breakdown properties by further optimizing the Efield distribution between the source and drain regions, and BV is remarkably increased. Furthermore, Ron,sp can be decreased by the NT. Finally, it breaks through the triple RESURF to achieve the FOM of 4.87 MW/cm2.