부산대학교 도서관

In this brief, the impact of back gate bias (Vgb) , on analog performance of silicon on insulator dopingless transistor (SOIDLT) is investigated. It is observed that SOI-DLTs are more immune to Vgb in contrast to its conventional counterpart SOI junctionless transistor (SOI-JLT). When Vgb is increased from -1.5 V to 1.5 V, the variation in transconductance (gm) and intrinsic gain ( gmrO ) of SOI-JLT is 1.3 and 21.4 times higher than SOI-DLT. The insignifi cant variation is observed in gm and gmrO of SOI-DLT against V gb than SOI-JLT due to the use of lightly doped channel. Further, the device reliability of SOI-DLT against impact ionization is evaluated by measuring the electron concentration and electric field near the drain side. We have found that the SOI-DLT is less sensitive to impact ionization in comparison to conventional SOI-JLT. Hence, the simulation results shown in this paper offer an opportunity for future analog integrated circuits designing with SOI-DLT structure under the influence of Vgb .