부산대학교 도서관

Directed Self-Assembly (DSA) is one of the candidates for scaling feature sizes beyond 10 nm node. DSA has shown the capability for pitch reduction, contact hole (CH) shrinks and improvement in pattern profile and pattern collapse margin. Defectivity is one of the critical criteria for implementation of DSA as a technically viable approach. However, only few defectivity studies of DSA shrink in various topography have been reported. In this paper, we investigated wafer-level defectivity of DSA shrink at various stages of the DSA patterning process. The contribution from each process step and materials are partitioned and categorized. The DSA defectivity was reduced by optimizing the material quality, surface treatment and pattern transfer processes. Systematic defect sources over the wafer map have been reduced. Finally, an outlook as to the guidelines and challenges to DSA CH shrinkage process will be discussed.