학술논문

Hardware architecture for security improved Fallahpour audio watermarking scheme
Document Type
Journal Article
Source
IEICE Electronics Express. 2014, 11(9):20140223
Subject
FPGA
audio watermarking
hardware architectures
Language
English
ISSN
1349-2543
Abstract
One of the audio watermarking schemes with highest payload published to date is Fallahpour scheme, achieving about 3 kbps [1]. A keybased security improvement to this algorithm is proposed in [2] while significatively maintaining the payload. In this letter, a high throughput and compact hardware architecture for the Security Improved Fallahpour Audio Watermarking Scheme is proposed, demonstrating the suitability of this algorithm for real-time applications.