학술논문
A BiCMOS programmable frequency divider
Document Type
Academic Journal
Author
Source
IEEE Transactions on Circuits and Systems-II: Analog and Digital.. March, 1992, Vol. 39 Issue 3, p147, 8 p.
Subject
Language
ISSN
1057-7130
Abstract
A programmable frequency divider for incorporation into a frequency synthesis chip is fabricated with bipolar complementary metal oxide semiconductor (CMOS) technology. Designed for 165 MHz operation, it has 15 stages on an area of 0.375 square mm and an energy dissipation of around 55 mW. The device realization is discussed to illustrate the various incompatibility problems associated with the integration of bipolar and CMOS technology.