학술논문
A highly manufacturable 28nm CMOS low power platform technology with fully functional 64Mb SRAM using dual/tripe gate oxide process
Document Type
Conference Paper
Author
Wu, S.-Y.; Liaw, J.J.; Lin, C.Y.; Chiang, M.C.; Yang, C.K.; Cheng, J.Y.; Tsai, M.H.; Liu, M.Y.; Wu, P.H.; Chang, C.H.; Hu, L.C.; Lin, C.I.; Chen, H.F.; Chang, S.Y.; Wang, S.H.; Tong, P.Y.; Hsieh, Y.L.; Pan, K.H.; Hsieh, C.H.; Chen, C.H.; Yao, C.H.; Chen, C.C.; Lee, T.L.; Chang, C.W.; Lin, H.J.; Chen, S.C.; Shieh, J.H.; Tsai, M.H.; Jang, S.M.; Chen, K.S.; Ku, Y.; See, Y.C.; Lo, W.J.
Source
In: Digest of Technical Papers - Symposium on VLSI Technology , 2009 Symposium on VLSI Technology, VLSIT 2009. (Digest of Technical Papers - Symposium on VLSI Technology, 2009, :210-211)
Subject
Language
English
ISSN
07431562