학술논문
Temperature- and aging-resistant inverter for robust and reliable time to digital circuit designs in a 65nm bulk CMOS process
Document Type
Conference Paper
Source
In: 2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design, IOLTS 2016 , 2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design, IOLTS 2016. (2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design, IOLTS 2016, 20 October 2016, :121-125)
Subject
Language
English