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Device and circuit-level evaluation of a zero-cost transistor architecture developed via process optimization

Document Type

Article

Author

Devoge, P.; Malherbe, A.; Julien, F.; Marzaki, A.; Regnier, A.; Aziza, H.; Lorenzini, P.; Masson, P.; Niel, S.

Source

In: Solid-State Electronics. (Solid-State Electronics, March 2023, 201)

Subject

Language

English

ISSN

00381101

Online Access

Full Text (ScienceDirect 종량제) Web of Science JCR 저널정보 Scopus Find it@PNU

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