학술논문
Device Feasibility of 60-nm-Scaled Vertical-Channel Memory Transistors Using InGaZnO Channel and ZnO Charge-Trap Layers
Document Type
Article
Author
Source
In: IEEE Transactions on Electron Devices . (IEEE Transactions on Electron Devices, 1 March 2024, 71(3):1839-1844)
Subject
Language
English
ISSN
15579646
00189383
00189383