학술논문

Improvement of thermal stability of via resistance in dual damascene copper interconnection
Document Type
Conference
Source
International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138) Electron devices meeting Electron Devices Meeting, 2000. IEDM '00. Technical Digest. International. :123-126 2000
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Photonics and Electrooptics
Thermal resistance
Thermal stability
Copper
Annealing
Cooling
Tin
Adhesives
Integrated circuit interconnections
Circuit stability
Thermal degradation
Language
Abstract
Thermal stability of via resistance in the multilevel dual damascene Cu interconnection was investigated. The via resistance stability strongly depends on via size, via density and width of connecting Cu wires. The significant via-resistance shift was introduced by stress-induced voiding. To avoid the voiding failure, optimization of heat treatments after electroplating (EP)-Cu deposition are necessary for both stability of Cu films and adhesion of barrier layer with Cu. Thermal stress balance between Cu wires and inter-level-dielectric (ILD) is also important to suppress the via degradation. The dual damascene structure with lower-stress and lower-Young's modulus ILD films such as FSG can provide wider process windows for the stability of the via resistance.