학술논문
Backside PDN and 2.5D MIMCAP to Double Boost 2D and 3D ICs IR-Drop beyond 2nm Node
Document Type
Conference
Author
Source
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) VLSI Technology and Circuits (VLSI Technology and Circuits), 2022 IEEE Symposium on. :429-430 Jun, 2022
Subject
Language
ISSN
2158-9682
Abstract
In this paper, backside power delivery network (BS-PDN) and a high density 2.5D Mimcap (Metal-insulator-metal capacitor) are applied to improve dynamic IR-drop of 2D and 3D ICs at a sub-2nm node. An on-chip PDN design and IR drop modelling framework is proposed and calibrated with the physical design results of 64-bit low power CPU. The calibrated framework is applied to 2D IC PDN with various Mimcap integration and then to 3D IC PDN. The 2.5D Mimcap used here was manufactured with optimized capacitance density of ~70 fF/um 2 . The BSPDN using 2.5D Mimcap has 32.1%/23.5% improvement in IR drop over the no Mimcap/2D Mimcap counterparts respectively, and BSPDN shows 36.3% improvement over the front side PDN (FSPDN) counterpart. Furthermore, by using 2.5D Mimcap + BSPDN in the 3D-IC, the top logic die IR drop is improved by 21.7%.