학술논문
A million cycle 0.13um 1Mb embedded SONOS Flash memory using Successive Approximated Read Calibration
Document Type
Conference
Author
Source
2008 IEEE Custom Integrated Circuits Conference Custom Integrated Circuits Conference, 2008. CICC 2008. IEEE. :427-430 Sep, 2008
Subject
Language
ISSN
0886-5930
2152-3630
2152-3630
Abstract
A 1Mb embedded 2T-SONOS Flash macro is implemented in 0.13um logic compatible process. The Flash macro has improved reliability and yield with a power-on Successive Approximated Read Calibration (SARC). Word-line decoder area is greatly reduced using 1.8V transistors to tolerate high voltage. Source degenerated compensation is implemented to enhance read margin. The Flash macro consumes 1.0mA at 50ns 1.8V access and 0.5uA in standby mode, and achieves one million cycling and 20-year data retention.