학술논문

Hardware Circuits and Systems Design for Post-Quantum Cryptography—A Tutorial Brief
Document Type
Periodical
Source
IEEE Transactions on Circuits and Systems II: Express Briefs IEEE Trans. Circuits Syst. II Circuits and Systems II: Express Briefs, IEEE Transactions on. 71(3):1670-1676 Mar, 2024
Subject
Components, Circuits, Devices and Systems
Hardware
NIST
Circuits and systems
Tutorials
Computers
Arithmetic
Standards
Arithmetic operation
hardware cryptographic design for PQC
circuits and systems design techniques
Language
ISSN
1549-7747
1558-3791
Abstract
Due to the increasing threats from possible large-scale quantum computers, post-quantum cryptography (PQC) has drawn significant attention from various communities recently. In particular, along with the National Institute of Standards and Technology (NIST) PQC standardization process, more works have gradually switched to the PQC hardware implementations. Following this trend, this tutorial brief, led by a group of experts in the field, aims to deliver a comprehensive tutorial on hardware circuits and systems design for PQC. After introducing primary arithmetic operations and algorithmic features of different PQC, we introduced related PQC hardware circuits and systems design techniques (from component to system levels). Future research and directions are also provided. This tutorial will provide useful information for the TCAS-II community and the broader Circuits and Systems Society.