학술논문
Integration of 4F2 selector-less crossbar array 2Mb ReRAM based on transition metal oxides for high density memory applications
Document Type
Conference
Author
Lee, Hyung Dong; Kim, S. G.; Cho, K.; Hwang, H.; Choi, H.; Lee, J.; Lee, S. H.; Lee, H. J.; Suh, J.; Chung, S.-O.; Kim, Y. S.; Kim, K. S.; Nam, W. S.; Cheong, J. T.; Kim, J. T.; Chae, S.; Hwang, E.-R.; Park, S. N.; Sohn, Y. S.; Lee, C. G.; Shin, H. S.; Lee, K. J.; Hong, K.; Jeong, H. G.; Rho, K. M.; Kim, Y. K.; Chung, S.; Nickel, J.; Yang, J. J.; Cho, H. S.; Perner, F.; Williams, R. S.; Lee, J. H.; Park, S. K.; Hong, S.-J.
Source
2012 Symposium on VLSI Technology (VLSIT) VLSI Technology (VLSIT), 2012 Symposium on. :151-152 Jun, 2012
Subject
Language
ISSN
0743-1562
2158-9682
2158-9682
Abstract
4F 2 selector-less crossbar array 2Mb ReRAM test chip with 54nm technology has been successfully integrated for high cell efficiency and high density memory applications by implementing parts of decoders to row/column lines directly under the cell area. Read/write specifications for memory operation in a chip are presented by minimizing sneak current through unselected cells. The characteristics of memory cell (nonlinearity, Kw >8, Iop