학술논문

Performance Evaluation of Algorithms for Optimizing Processor Simulator Parameters
Document Type
Conference
Source
2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT) Solid-State & Integrated Circuit Technology (ICSICT), 2022 IEEE 16th International Conference on. :1-3 Oct, 2022
Subject
Components, Circuits, Devices and Systems
Semiconductor device modeling
Performance evaluation
Microarchitecture
Moore's Law
Manuals
Data models
Task analysis
Language
Abstract
With Moore's Law coming to an end, the improvement of processor performance largely depends on the optimization of processor microarchitecture, so processor simulator plays a more and more important role in modern high-performance processor design. As the simulation task becomes complex and sophisticated, more and more tunable parameters with different data types have been exposed to human beings, and affect the quality-of-result (QoR) metrics of the simulator outcome. A fully functional processor simulator, such as gem5, often has huge parameter space and long execution time, which makes it almost impossible for engineers to perform thorough manual tuning. This paper mainly evaluates the performance of SA, TPE, and CMA-ES optimization algorithms in the above scenarios and gives some suggestions for reference based on the results.