학술논문

A 553 K-transistor LISP processor chip
Document Type
Periodical
Source
IEEE Journal of Solid-State Circuits IEEE J. Solid-State Circuits Solid-State Circuits, IEEE Journal of. 22(5):808-819 Oct, 1987
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Computing and Processing
Clocks
Instruments
Computer architecture
Read-write memory
Pins
Packaging
Process design
Pipelines
Senior members
Microprocessors
Language
ISSN
0018-9200
1558-173X
Abstract
The authors describe a LISP microprocessor which includes over 550 K transistors, has 114 K of on-chip RAM, and runs instructions in a single 30-ns clock cycle. The chip is implemented in 1.25-/spl mu/m double-level-metal (DLM) CMOS, has 224 pins, and is packaged in a custom pin-grid array. The microinstruction and macroinstruction sets of this chip are compatible with an existing LISP processor. An extensive discussion of test features designed into the processor chip is given.