학술논문
A soft-error-immune maintenance-free TCAM architecture with associated embedded DRAM
Document Type
Conference
Author
Source
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005. Custom Integrated Circuits Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005. :451-454 2005
Subject
Language
ISSN
0886-5930
2152-3630
2152-3630
Abstract
This paper describes a novel TCAM architecture with associated embedded DRAM. The design concept improves the soft error immunity by 6 digits, and also resolves the critical problems of the look-up table maintenance of TCAM. The proposed architecture in this paper is especially attractive for realizing soft-error immune, high-performance TCAM chips.