학술논문

High Performance Autoassociative Neural Network Using Network on Chip
Document Type
Conference
Source
2009 First International Conference on Information Science and Engineering Information Science and Engineering (ICISE), 2009 1st International Conference on. :4015-4018 Dec, 2009
Subject
Computing and Processing
Communication, Networking and Broadcast Technologies
Neural networks
Network-on-a-chip
Neurons
Artificial neural networks
Transfer functions
Production systems
Hardware
Information science
Computational modeling
Noise reduction
Language
ISSN
2160-1283
2160-1291
Abstract
In this paper, an Artificial Autoassociative Neural Network (AANN) is implemented by Network on Chip (NoC) architecture to solve communication and performance problem. This proposed NoC based system can map four neurons in one PE and the whole system consists of PEs each of which connects with a router. This system is reconfigurable and extendable so that it can easily suit for different applications. Simulation results show that the proposed implementation method can reduce communication load and total computation time.