학술논문

Copper Trace Fatigue Life Modeling for Rigid Electronic Assemblies
Document Type
Periodical
Source
IEEE Transactions on Device and Materials Reliability IEEE Trans. Device Mater. Relib. Device and Materials Reliability, IEEE Transactions on. 21(1):79-86 Mar, 2021
Subject
Engineered Materials, Dielectrics and Plasmas
Components, Circuits, Devices and Systems
Power, Energy and Industry Applications
Copper
Fatigue
Strain
Surface finishing
Load modeling
Materials reliability
Stress
Copper trace
copper trace fatigue
copper fatigue model
FEA
Language
ISSN
1530-4388
1558-2574
Abstract
While solder interconnects tend to be the focus of reliability studies in electronics, increased exposure to flexural loads and the use of stiffer (higher density) packages are raising concern regarding the fatigue failure of copper metallization (traces and solder pads) on printed circuit boards. To better understand the failure risks of copper trace, experiments examining the effect of variations in solder pad and trace design on the fatigue durability of copper traces were conducted. Experiments were also conducted to determine the impact of assembly variations, presence of surface finish, solder mask, and assembled components, on the fatigue durability of the traces. The durability data collected from the experiment was used in conjunction with the finite element analysis estimated critical trace strain ranges to develop a set of compatible fatigue model constants that best fit the failure behavior observed in the tests. Finally, the established fatigue life model constants were validated with additional tests conducted at different load level. The predicted cycles to failure compared well with the experimental cycles to failure.