학술논문
BiCMOS fault models: is stuck-at adequate?
Document Type
Conference
Author
Source
Proceedings., 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings, 1990 IEEE International Conference on. :294-297 1990
Subject
Language
Abstract
The adequacy of the stuck-at fault model for BiCMOS logic is investigated. Realistic failures in basic logic blocks are examined, and their coverage by the stuck-at model is explored. It is shown that the static stuck-at model cannot cover the complete range of possible failures, and more importantly, tests for stuck-at faults will not detect realistic features in BiCMOS technology. This is because most open faults manifest themselves as delay failures. Through the use of transient analysis it is shown that the only way to insure proper functioning of BiCMOS circuits is to test for delay faults.ETX