학술논문

Fault conditions of a simple chaotic circuit under capacitor nonlinear effects
Document Type
Conference
Source
2015 16th Latin-American Test Symposium (LATS) Test Symposium (LATS), 2015 16th Latin-American. :1-5 Mar, 2015
Subject
Aerospace
Components, Circuits, Devices and Systems
Computing and Processing
Engineering Profession
Capacitance
Capacitors
Oscillators
Chaotic communication
Hardware design languages
Circuit faults
Chaos
Oscillator
Verilog
Nonlinear Capacitor
Varactor
Modelling
Language
ISSN
2373-0862
Abstract
In this paper a tolerance analysis in the electronic design of a simple chaos generator is reported. This simple chaotic oscillator is composed by four resistors, three capacitors and two opamps. A Verilog-A model for the opamps and capacitors is used herein. For the opamp, the model contains input impedance, finite bandwidth with a dominant pole and voltage saturation effects. In case of capacitor, a nonlinear model based on a varactor is considered, which includes the charge-dependence with the voltage. By using H-Spice simulator, the sensitivity of the chaos generation in the simple chaotic oscillator as a function of the varactor is analyzed. Several H-Spice simulations are given.