학술논문

Comparison between mesa isolation and p+ implantation isolation for 4H-SiC MESFET transistors
Document Type
Conference
Source
CAS 2011 Proceedings (2011 International Semiconductor Conference) Semiconductor Conference (CAS), 2011 International. 2:317-320 Oct, 2011
Subject
Components, Circuits, Devices and Systems
Communication, Networking and Broadcast Technologies
Computing and Processing
MESFETs
Junctions
Silicon carbide
Fabrication
Etching
Materials
4H-SiC
P+ implantation
mesa etching
JFET
MESFET
SiC integrated circuits
Language
ISSN
1545-827X
2377-0678
Abstract
Silicon Carbide (SiC) is considered the wide band gap semiconductor material that can presently compete with silicon (Si) material for power switching devices. Progresses in the manufacturing of high quality SiC substrates open the possibility to new circuit applications. SiC unipolar transistors, such as JFETs and MESFETs have also a promising potential for digital integrated circuits operating at high temperature and/or in harsh environments. An increasing demand for high temperature compliant circuits comes from intelligent power management, automotive industry, and intelligent sensors for harsh environment, space and aerospace as well. Mesa isolation is a widely used isolation technique for the definition of individual devices due to its simplicity as fabrication process [1]. It is mostly used for the protection of high power devices. The junction isolation is widely used for bipolar, Bi-CMOS integrated circuits (IC) and can be achieved by diffusion or implantation process. The present work is presenting the experimental comparison between the mesa isolation process and p+ implantation junction isolation for 4H-SiC MESFET transistors.