학술논문

Power and speed-efficient code transformation of multimedia algorithms for RISC processors
Document Type
Conference
Source
1998 IEEE Second Workshop on Multimedia Signal Processing (Cat. No.98EX175) Multimedia signal processing Multimedia Signal Processing, 1998 IEEE Second Workshop on. :317-322 1998
Subject
Signal Processing and Analysis
Computing and Processing
Communication, Networking and Broadcast Technologies
Reduced instruction set computing
Decoding
Application software
Hardware
Bandwidth
MPEG 4 Standard
Multimedia systems
Capacitive sensors
Application specific integrated circuits
Delay
Language
Abstract
The upcoming multimedia processing applications will require high memory bandwidth. We estimate that a software reference implementation of an MPEG-4 video decoder typically requires 200 Mtransfers/s to memory to decode 1 CIF (352/spl times/288) video object plane (VOP) at 30 frames/s. This imposes a high penalty in terms of power but also performance. However, we also show that we can heavily improve on the memory accesses and data transfers, without sacrificing speed (even gaining about 10% on cache misses and cycles for a DEC Alpha), by aggressive code transformations. For this purpose, we have applied an extended version of our data transfer and storage exploration methodology, partly supported in the ATOMIUM environment, which was originally developed for custom hardware implementations.