학술논문

Gate-Length Dependence of Vertical GaSb Nanowire p-MOSFETs on Si
Document Type
Periodical
Source
IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 67(10):4118-4122 Oct, 2020
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Logic gates
MOSFET
Nanoscale devices
Metals
Plasmas
Etching
III–V
GaSb
metal–oxide–semiconductor field-effect transistor (MOSFET)
nanowire
scaling
vertical
Language
ISSN
0018-9383
1557-9646
Abstract
The effect of gate-length variation on key transistor metrics for vertical nanowire p-type GaSb metal–oxide–semiconductor field-effect transistors (MOSFETs) are demonstrated using a gate-last process. The new fabrication method enables short gate-lengths ( ${L}_{g} =40$ nm) and allows for selective digital etching of the channel region. Extraction of material properties as well as contact resistance are obtained by systematically varying the gate-length. The fabricated transistors show excellent modulation properties with a maximum ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}} =700$ ( ${V}_{GS} = -0.5$ V) as well as peak transconductance of $50~\mu \text{S}/\mu \text{m}$ with a linear subthreshold swing of 224 mV/dec.