학술논문
3D Stacking Using Bump-Less Process for Sub 10um Pitch Interconnects
Document Type
Conference
Author
Source
2016 IEEE 66th Electronic Components and Technology Conference (ECTC) Electronic Components and Technology Conference (ECTC), 2016 IEEE 66th. :128-133 May, 2016
Subject
Language
Abstract
In this paper a bump-less process is introduced in order to further scale down the pitch of microbumps. Electrical resistance measurement, Cross section SEM and mechanical characterizations show successful 3D stacking using proposed method.