부산대학교 도서관

Backplane buses are becoming a legacy for high rate, high volume data processing applications. Higher efficiency at lower cost is offered by the PCI bus technology, compared to crate-embedded processors. Becoming part of the plug&play domain of the host's operating system, no additional data transfer protocols are needed. We have combined the PCI technology with high-density FPGA logic and common mezzanine standards on a flexible PCI card. First applications cover readout controllers for legacy bus protocols, high-speed link I/O and fast analog input data conversion. A field programmable gate array (FPGA) with embedded PCI master/target core serves as programmable interface between the PCI bus, mezzanine cards and a local SDRAM. Adapter mezzanine cards, implemented according to the IEEE P1386 or similar common standards, are used for level conversion, trigger interfacing or preprocessing. The application-dependent controller functions as well as SDRAM and PCI interfacing are handled by FPGA logic. A Linux driver was developed to achieve high bandwidth via CPU-initiated transfers. Control software for Windows and an interface for LabView target control and monitoring applications via graphical interfaces. First experience and applications will be reported.