학술논문
Designing a CMOS differential pair
Document Type
Conference
Source
15th International Conference on Electronics, Communications and Computers (CONIELECOMP'05) Electronics, Communications and Computers Electronics, Communications and Computers, 2005. CONIELECOMP 2005. Proceedings. 15th International Conference on. :236-239 2005
Subject
Language
Abstract
Taking into account portable applications, where users are requiring larger durability of a single battery, in this paper the design of a linear differential-pair is presented. This circuit (hereafter named basic-block) is sized according to the technological design rules of a 1.2 /spl mu/m CMOS fabrication process. Even when the basic-block is biased with 5 V, and the same is true for the whole system, the power supply is actually a 1.5 V battery. In this research we are assuming that the maximum driven current is of the order of 1 mA.