학술논문

RAPTOR-Design: Refactorable Architecture Processor to Optimize Recurrent Design
Document Type
Conference
Source
2012 Brazilian Symposium on Computing System Engineering Computing System Engineering (SBESC), 2012 Brazilian Symposium on. :188-191 Nov, 2012
Subject
Computing and Processing
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Field programmable gate arrays
Detectors
Computer architecture
Hardware
Fault tolerance
Fault tolerant systems
Registers
FPGA
Microprocessor
Custom Computational Units
Language
ISSN
2324-7886
2324-7894
Abstract
The growth in embedded systems complexity has created the demand for novel tools which allow rapid systems development and facilitate the designer's management of complexity. Especially since systems must incorporate a variety of often contradictory characteristics, achieving design metrics in short development time is an increasing challenge. This paper presents RAPTOR-Design, a framework for System-on-Chip (SoC) design which incorporates a customizable processor architecture and allows rapid software-to-hardware migration, custom hardware integration in a tightly-coupled fashion and seamless Fault Tolerance (FT) capabilities for FPGA platforms. Impact on design metrics of processor customization, FT-capabilities and custom hardware integration are presented, as well as an overview of the design process using RAPTOR-Design.