부산대학교 도서관

This article presents a generalized approach toward the dc-link voltage switching ripple analysis in the two-level multiphase pulsewidth modulation (PWM) voltage source inverters with a balanced load. Since the voltage ripple is one of the crucial sizing criteria for a dc-link capacitor, a simple and practical equation for designing the dc-link capacitor, based on the maximum (peak-to-peak) value of the dc-link voltage ripple, has been proposed for the multiphase inverters. The amplitude of the dc-link voltage switching ripple is analytically derived as a function of operating conditions. The effect of the number of phases on the dc-link capacitor size is investigated as well. It is found that considering the same total output current, the dc-link capacitor size is reduced by increasing the number of phases up to seven. However, from the point of view of the dc-link capacitor size, there are no benefits of further increasing the number of phases. Reference is made to two commonly used modulation strategies—sinusoidal PWM and continuous symmetric centered PWM (i.e., space vector). The mathematical models are derived with an aim to provide the precise dc-link capacitor sizing and hence improve the power density of the whole system. The comparison of different phase numbers has been made. Proposed theoretical developments are verified by the simulation and experimental tests.