학술논문

A 90nm 8b 120Ms/s-250Ms/s pipeline ADC
Document Type
Conference
Source
ESSCIRC 2008 - 34th European Solid-State Circuits Conference Solid-State Circuits Conference, 2008. ESSCIRC 2008. 34th European. :266-269 Sep, 2008
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Pipelines
Bandwidth
CMOS technology
Energy consumption
Switches
Timing
Clocks
Sampling methods
Operational amplifiers
Ethernet networks
Language
ISSN
1930-8833
Abstract
A dual operating mode 8b, 1.1V, 120MHz/250MHz, 9.4mW/22.8mW pipeline ADC for Gb Ethernet applications is presented. Considering 60MHz of signal bandwidth in both operating modes, the ADC achieves a peak SNDR of 44.1dB/40.7dB (7b/6.5b ENOB), featuring a minimum FoM of 0.84pJ/conv at 120MHz and 2.2pJ/conv at 250MHz. A 90nm CMOS technology was used to integrate the ADC whose active area is 1.25×0.65mm 2 .