부산대학교 도서관

${\rm Gd}_{2}{\rm O}_{3}$-based metal-insulator-metal capacitors have been characterized with single layer $({\rm Gd}_{2}{\rm O}_{3})$ and bilayer (${\rm Gd}_{2}{\rm O}_{3}/{\rm Eu}_{2}{\rm O}_{3}$ and ${\rm Eu}_{2}{\rm O}_{3}/{\rm Gd}_{2}{\rm O}_{3}$) stacks for analog and DRAM applications. Although single layer ${\rm Gd}_{2}{\rm O}_{3}$ capacitors provide highest capacitance density (15 ${\rm fF}/\mu{\rm m}^{2}$), they suffer from high leakage current density, poor capacitance density-voltage linearity, and reliability. The stacked dielectrics help to reduce leakage current density ($1.2\times 10^{-5}~{\rm A/cm}^{2}$ and $2.7\times 10^{-5}~{\rm A/cm}^{2}$ for ${\rm Gd}_{2}{\rm O}_{3}/{\rm Eu}_{2}{\rm O}_{3}$ and ${\rm Eu}_{2}{\rm O}_{3}/{\rm Gd}_{2}{\rm O}_{3}$, respectively, at ${-}{\rm 1}~{\rm V}$), improve quadratic voltage coefficient of capacitance (331 ${\rm ppm/V}^{2}$ and 374 ${\rm ppm/V}^{2}$ for ${\rm Gd}_{2}{\rm O}_{3}/{\rm Eu}_{2}{\rm O}_{3}$ and ${\rm Eu}_{2}{\rm O}_{3}/{\rm Gd}_{2}{\rm O}_{3}$ , respectively, at 1 MHz), and improve reliability, with a marginal reduction in capacitance density. This is attributed to lower trap heights as determined from Poole–Frenkel conduction mechanism, and lower defect density as determined from electrode polarization model.