학술논문

A In-depth Simulation Study of CMOS Inverters Based on the Novel Surrounding Gate Transistors
Document Type
Conference
Source
2008 International Conference on Advances in Electronics and Micro-electronics Advances in Electronics and Micro-electronics, 2008. ENICS '08. International Conference on. :15-19 Sep, 2008
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Integrated circuit modeling
CMOS integrated circuits
Inverters
Logic gates
Semiconductor device modeling
Silicon
Transistors
Language
Abstract
The main features of CMOS inverters based on the novel surrounding gate transistors (SGT) have been analyzed. A Verilog-A compact model for the SGT has been implemented in a circuit simulator to study both analog and digital circuits. In particular, CMOS inverter gate delays, CMOS inverter ring oscillator frequencies, etc., have been obtained in order characterize the relations between the most representative technological parameters of the transistors and the inverter performance. The transient response of a ring oscillator is investigated to explore the scaling possibilities of these devices.