학술논문

Investigation of Underfill Delamination in Flip Chip Packages by Finite Element Analysis
Document Type
Conference
Source
2022 23rd International Conference on Electronic Packaging Technology (ICEPT) Electronic Packaging Technology (ICEPT), 2022 23rd International Conference on. :1-4 Aug, 2022
Subject
Components, Circuits, Devices and Systems
Fields, Waves and Electromagnetics
Photonics and Electrooptics
Signal Processing and Analysis
Two dimensional displays
Finite element analysis
Flip-chip devices
Delamination
Electronics packaging
Interfacial delamination
energy release rate (G-value)
virtual crack-closure technique (VCCT)
J-integral
finite element analysis (FEA)
Language
Abstract
The most suitable method to study interface delamination issue is fracture mechanics based on energy criterion. It can be calculated by two methods, virtual crack-closure technique (VCCT) and J-integral in finite element analysis (FEA). Although both methods have developed maturely, the comparative analysis of the two methods is still lacking. In this paper, the influence of different mesh types and mesh sizes of crack tip on G value calculated by VCCT and J-integration are studied in detail through a two-dimensional (2D) multi-layer model. Furthermore, J-integral method was used to evaluate G-value at the interface between underfill (UF) and chip in a 2D flip chip package structure. Then, the influence of modulus and CTE of UF on G-value are discussed. Our study may contribute to quantitative assessment of the risk of UF delamination.