학술논문
Integration of 20nm half pitch single damascene copper trenches by spacer-defined double patterning (SDDP) on metal hard mask (MHM)
Document Type
Conference
Author
Source
2010 IEEE International Interconnect Technology Conference Interconnect Technology Conference (IITC), 2010 International. :1-3 Jun, 2010
Subject
Language
ISSN
2380-632X
2380-6338
2380-6338
Abstract
Spacer defined double patterning (SDDP) enables further pitch scaling using 193nm immersion lithography. This work aims to design and generate 20nm half pitch (HP) back-end-of-line test structures for single damascene metallization using SDDP with a 3-mask flow. We demonstrated patterning and metallization of 20nm HP trenches in silicon oxide with TiN metal hard mask (MHM).