학술논문

Quantitative 3-D Model to Explain Large Single Trap Charge Variability in Vertical NAND Memory
Document Type
Conference
Source
2019 IEEE International Electron Devices Meeting (IEDM) Electron Devices Meeting (IEDM), 2019 IEEE International. :32.1.1-32.1.4 Dec, 2019
Subject
Components, Circuits, Devices and Systems
Language
ISSN
2156-017X
Abstract
We present a TCAD model that reproduces large single trap V T -shifts (>100mV) in 3-D NAND flash read current by means of targeted charge placement based on linear response. With this model, we investigate worst-case V T -shifts in terms of bias conditions and junction position, showing low local carrier density at the origin of large shifts. We outline a sampling strategy that allows to reproduce experimental distributions for realistic grain size (12nm) and highlight the role of transconductance to explain anomalous large shifts.