학술논문

A 5 V Dynamic 16 K RAM with a New Memory Cell Needs Only 8 mm2
Document Type
Conference
Source
ESSCIRC 78: 4th European Solid State Circuits Conference - Digest of Technical Papers Solid State Circuits Conference - Digest of Technical Papers, 1978. ESSCIRC 78. 4th European. :99-102 Sep, 1978
Subject
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Read-write memory
Random access memory
Capacitance
Signal design
Capacitors
Silicon
Circuits
Testing
Power dissipation
Fabrication
Language
Abstract
A small 16 K RAM in double silicon technology using a novel dynamic memory cell has been realized and tested. using 3.5 ¿m design rules the complete memory is 8 mm 2 large. First samples achieved an access time of 160 ns with a power dissipation of 85 mW.

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