부산대학교 도서관

Performance modeling is a key bottleneck for analog design automation. Although machine learning-based models have advanced the state-of-the-art, they have so far suffered from huge data preparation cost, very limited reusability, and inadequate accuracy for large circuits. We introduce ML-based macro-modeling techniques to mitigate these problems for linear analog ICs and ADC/DACs. On representative testcases, our method achieves more than 1700× speedup for data preparation and remarkably smaller model errors compared to recent ML approaches. It also attains 3600× acceleration over SPICE simulation with very small errors and reduces data preparation time for an ADC design from 40 days to 9.6 hours.