학술논문

A Physically Unclonable Function Using Time-to-Digital Converter with Linearity Self-Calibration and its FPGA Implementation
Document Type
Conference
Source
2023 IEEE International Test Conference in Asia (ITC-Asia) Test Conference in Asia (ITC-Asia), 2023 IEEE International. :1-6 Sep, 2023
Subject
Aerospace
Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Power, Energy and Industry Applications
Robotics and Control Systems
Histograms
Asia
Linearity
Physical unclonable function
Delays
Field programmable gate arrays
Digital circuits
physically unclonable function
time-to-digital converter
linearity self-calibration
FPGA
Language
ISSN
2768-069X
Abstract
This paper presents a physically unclonable function (PUF) using flash time-to-digital converter (TDC) with linearity self-calibration. The proposed PUF utilizes that the variation of delay of delay elements of TDC is unique to the device and unclonable. The proposed PUF is constructed using the flash TDC with linearity self-calibration using histogram method. With the linearity self-calibration operation, variation of delay elements is estimated. The response output of the PUF is calculated using the estimated variation and the challenge inputs. The proposed PUF is a simple digital circuit consisting of basic digital elements. It is easy to design and implement to both SoC and FPGA. It can be used as not only strong PUF but also as a TDC with fine linearity. The experimental results with Artix7 FPGA show that the intra-chip variation is 8.9 % and the inter-chip variation is 46.9 %. The probability of the correct identification is 99.8 %. Extra resources to construct the proposed PUF are 33.7 % of the resources of the TDC with linearity self-calibration.