학술논문
Validation of the atlas trigger/daq network architecture using hardware data emulators
Document Type
Periodical
Author
Source
IEEE Transactions on Nuclear Science IEEE Trans. Nucl. Sci. Nuclear Science, IEEE Transactions on. 51(3):539-544 Jun, 2004
Subject
Language
ISSN
0018-9499
1558-1578
1558-1578
Abstract
Hardware data emulators are used to deploy a large-scale model of the ATLAS data acquisition architecture. The emulators, based on FPGAs and on the Alteon gigabit Ethernet NIC, are described, and their performance determined. The emulators are used in the large-scale test bed; sample results are presented.