학술논문
Pushing the limit of lithography for patterning two-dimensional lattices in III-V semiconductor quantum wells
Document Type
Conference
Author
Source
2021 5th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) Electron Devices Technology & Manufacturing Conference (EDTM), 2021 5th IEEE. :1-3 Apr, 2021
Subject
Language
Abstract
Building two-dimensional lattices in semiconductor quantum-wells offers the prospect to design distinct energy-momentum dispersions, including conical intersections and nondispersive bands. Here, we compare three lithographic patterning methods, e-beam lithography, block copolymer lithography and thermal scanning probe lithography to produce a honeycomb lattice in an In 0.53 Ga 0.47 As quantum well. We weigh up the pros and cons of each method to reach lattice constants smaller than 20 nm with a minimum of dispersion in the pore size.