부산대학교 도서관

An active probe and microstimulator SoC for interfacing with peripheral nerves is presented. It performs 64-channel artifact-tolerant neural recording, cuff imbalance compensation by impedance sensing, and neurostimulation for the closed-loop operation. Each recording channel is a second-order opamp-less $\Delta \Sigma $ ADC that consumes 140 nW and occupies 0.01 mm 2 area in 130 nm CMOS. The single-loop $\Delta \Sigma $ architecture achieves second-order noise shaping with two passive integrators. To the best of our knowledge, this yields the lowest power and area of any second-order $\Delta \Sigma $ ADC and the lowest FOM (fJ/conv. step) of any passive second-order $\Delta \Sigma $ ADC (27 fJ/conv. step). The SoC uniquely performs multi-modal input signal recording: voltage (for neural recording) and current (for impedance sensing) are measured concurrently using frequency multiplexing. The SoC also features a 60 MHz energy-efficient inductive powering link and a 600 MHz RF data communication link. The prototype is validated in vivo in the rat sciatic nerve for electroneurogram (ENG) sensing and the correction of impedance-imbalance in cuff electrodes.