학술논문
Method for Increasing the OpAmp’s Speed on the Basis of Complementary “Folded” Cascodes
Document Type
Conference
Source
2024 Conference of Young Researchers in Electrical and Electronic Engineering (ElCon) Young Researchers in Electrical and Electronic Engineering (ElCon), 2024 Conference of. :548-551 Jan, 2024
Subject
Language
ISSN
2376-6565
Abstract
The paper presents a promising method of increasing by more than an order of magnitude the maximum slew rate (SR) of integrated operational amplifiers (OpAmps) based on two-cycle “folded“ cascodes. This method is based on the introduction of special differentiating transient correction circuits into the classical circuits of OpAmps. Developed on the basis of the MH2XA031 array chip, the high-speed OpAmp is recommended for practical use in the subclass of so-called discrete-analog SC-filters on switched capacitors, for which (in some important cases) higher SR values are required. The effect of significantly improving the OpAmp’s speed is to provide higher output current levels of the two-cycle “folded” cascode that recharges the integrating correction capacitor during the transient edge. The OpAmp’s speed performance in the large-signal mode is increased from $248.7 \mathrm{~V} / \mu \mathrm{s}$ to $4148 \mathrm{~V} / \mu \mathrm{s}$ as a result of this.