학술논문

Analog-Domain Self-Interference Cancellation for Practical Multi-Tap Full-Duplex System: Theory, Modeling, and Algorithm
Document Type
Periodical
Source
IEEE Journal on Selected Areas in Communications IEEE J. Select. Areas Commun. Selected Areas in Communications, IEEE Journal on. 41(9):2796-2807 Sep, 2023
Subject
Communication, Networking and Broadcast Technologies
Interference cancellation
Delays
Hardware
Quantization (signal)
Optimization
Integrated circuit modeling
Delay effects
Full-duplex
optimization
outer hull
self-interference cancellation
wireless communications
Language
ISSN
0733-8716
1558-0008
Abstract
Practical, in-band, full-duplex (IBFD) systems typically require more than 100 dB of self-interference cancellation (SIC). Digital processing alone is insufficient for achieving this target, which drives us towards supplementary analog mitigation techniques. We propose an analog-domain, self-interference cancellation circuit to enable pass-band, analog SIC in an IBFD system. Analog SIC is limited by several hardware constraints and design choices, including finite tap-delay resolution, non-negative tap constraints, and bit precision quantization. We characterize the performance impact of each of these limitations as a function of signal bandwidth, carrier frequency, bit precision, and other system design parameters. We further characterize the achievable system performance under all of these limitations combined. We simulate several realistic examples to illustrate the relationship between the achievable self-mitigation performance and various system design choices. We implement a simple constrained optimization algorithm informed by these results to optimize the tap-delay weights of the analog circuit under these system constraints. We simulate the achievable mitigation performance and demonstrate as much as 45 dB of analog-domain, self-interference mitigation of a wide-band signal with realistic system configurations.